package examples

import chisel3._
import chisel3.experimental.DataMirror

class Adder extends MultiIOModule {
  val a = IO(Input(UInt(8.W)))
  val b = IO(Input(UInt(8.W)))
  val c = IO(Output(UInt(8.W)))
  c := a +& b
}

class Test extends MultiIOModule {
  val adder = Module(new Adder)
  // for debug only
  adder.a := DontCare
  adder.b := DontCare

  // Inspect ports of adder
  // Prints something like this
  /**
    * Found port clock: Clock(IO clock in Adder)
    * Found port reset: Bool(IO reset in Adder)
    * Found port a: UInt<8>(IO a in Adder)
    * Found port b: UInt<8>(IO b in Adder)
    * Found port c: UInt<8>(IO c in Adder)
    */
  DataMirror.modulePorts(adder).foreach { case (name, port) => {
    println(s"Found port $name: $port")
  }}

}
object TestTop extends App {
  chisel3.Driver.execute(Array[String](), () => new Test)
}
